library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;


library lib_expoRNS;

entity master_bench is
  
end master_bench;


architecture bench1 of master_bench is

  component master_unit

  generic(
	Z : positive range 1 to 256 := 16 ;		-- Nombre de bits du module
	
	N_alpha : positive := 256;	-- Vecteur de base : OBLIGATOIREMENT de la forme 2^n
        log2Ralpha : positive := 8;
                                      
	
	N_beta1 : positive  := 255;	-- Vecteur de base : OBLIGATOIREMENT PAS de la forme 2^n
        
	R_beta1 : positive  := 512;
        log2Rbeta1 : positive := 9;
	k_beta1 : positive  := 257;
	
	N_beta2 : positive := 127;	-- Vecteur de base : OBLIGATOIREMENT de la forme 2^n 
	R_beta2 : positive := 1024;
        log2Rbeta2 : positive := 10;
	k_beta2 : positive := 129;

        e1 : positive := 4177665;       --Coefficiant form TRC (view enwikipedia TRC)
        e2 : positive := 8225536;       
        e3 : positive := 4177920
        ) ;
  port (
    a   : in  std_logic_vector;                 -- Nombre a exponentier
    p   : in  std_logic_vector(Z-1 downto 0);   -- Puissance
    clk : in  std_logic;
    reset : in std_logic;
    start : in std_logic;
    S   : out std_logic_vector(Z-1 downto 0));  -- Nombre exponentier
  end component;

  signal a,p,S : std_logic_vector(16-1 downto 0) := (others => '0');
  signal start,reset,fin : std_logic := '0';
  signal clk : std_logic := '1';
begin 
  
  
master:master_unit port map( a,p,clk,reset,start,S);

  clk <= not clk after 10 ns;
 process
    constant delay_exp : time := 10000 ns;
    constant delay_reset : time := 10 ns;
  begin
    reset <= '0';
    wait for delay_reset ;
    
    -- 2^2 
    reset <= '1';
    a <= "0000000000000010";
    p <= "0000000000000010";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 2^4
    reset <= '1';
    a <= "0000000000000010";
    p <= "0000000000000100";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 2^1
    reset <= '1';
    a <= "0000000000000010";
    --p <= "0000000000000110";
    p <= "0000000000000101";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 2^8
    reset <= '1';
    a <= "0000000000000010";
    p <= "0000000000001000";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 3^4
    reset <= '1';
    a <= "0000000000100011";
    p <= "0000000000000100";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 3^4
    reset <= '1';
    a <= "0000000000000011";
    p <= "0000000000000100";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

    
    -- 0^0
    reset <= '1';
    a <= "0000000000000000";
    p <= "0000000000000000";

    wait for delay_reset ;
    reset <= '0';
    start <= '1';

    wait for delay_exp;

  end process;
  

end bench1;
